ALSE History

This is the (now long) History of A.L.S.E !

Inception

ALSE was created in 1993 by Bertrand Cuzeau to promote new digital design tools and methodologies, and to introduce Synario (a new tool from Data I/O) in France.
At that time, only ASIC designers used Verilog or VHDL synthesis and simulation, while Programmable Logic designers were stuck with primitive tools based on schematics using proprietary libraries, with first generation languages (Abel, Palasm, Cupl…) and with gate-level simulators (at best !).
FPGAs were newborns and were designed painfully with schematic and custom tools.

Synario

Synario was a milestone in the FPGA industry, bringing affordable HDL synthesis and simulation in an integrated framework, and offering Top-Down design, vendor-independence, portability, HDL simulation, generic schematics, etc… This was the beginning of our “crusade” to help these changes happen in the (French) industry.

HDL FPGA Design Methodologies

At all times, the adoption of new Methodologies is a major challenge, and High Quality Training Courses with Expert Instructors are the best way to facilitate the transition. It’s therefore no surprise that we developed our own specific Training Course Material (Digital Design Basics, Abel, Verilog, and VHDL). Synario users were the obvious target, but this Training activity quickly spread up with various partnerships (semi-houses, European Programs like Jessica) in France and in Switzerland : engineers loved our Training courses because of their concrete & proven efficiency.

Services

In ‘97, with the turmoil in Design tools and EDA companies, we focused on Services rather than products : Design sub-contracting, Consulting and indeed Training courses. The success was immediate and we designed more and more complex systems while the Programmable Logic chips went from a few thousands of gates to the (many) million(s) we use today. We were proud to demonstrate de-facto how well the methodologies we did teach worked for us.

Since then, Synario and all its competitors (Viewlogic, Veribest…) disappeared (Synario was purchased by Xilinx), but the methodologies they introduced are now well established. The Synario nostalgics can still find traces of it in the old Xilinx’s ISE and Lattice ispLever. Note that most of the concepts developed for Synario are now standard in all tools, more than 20 years later !

HDL Trainings Leader

The next logical step occurred at the end of ‘99 when ALSE became the official Doulos UK Partner to delivery the Doulos Training Course in France. Despite the success of ALSE’s modest training course material, the decision was taken to switch to the extremely rich Doulos portfolio. The quality and the wide scope of the Doulos portfolio were key factors in the decision (VHDL , VHDL-AMS, Expert VHDL Design, Expert VHDL Verification, Verilog, SystemVerilog, PSL, SystemC, Expert SystemC, Tcl/Tk, etc). The Training courses are updated and improved with the continuous involvement of many engineers (including ALSE’s). Our collaboration with Doulos is very tight.

Altera

In May 2003, ALSE became the Altera Technical Training Partner in France.

We built rapidly a new extensive and logical portfolio of Training courses for Altera with two major courses : one for Designing with Quartus II (3 days) and the other focused on Altera SOPC Nios II (3 to 5 days). Then, along the years and with the new devices, we added many other trainings.

After the success we experienced in France, Altera asked us to offer these Training courses in other European countries and we currently serve Benelux, UK, Germany, The Netherlands… We built a cross-agreement with Doulos to take advantage of their international presence.

… and today !

In 2016, after 23 years of continued growth and success,and after having developed many IPs, ALSE is now well established and balanced between the following activities:

  • Custom Design and Services,
  • Developing and selling innovative and High Performance IPs
  • Services in the Embedded Computing space
  • Delivering the FPGA Design and HDL Languages Training Courses in France
  • Designing and Delivering our Altera trainings in France and part of Europe
  • Delivering Embedded Linux trainings
  • Developping High Performance FPGA boards (Cyclone V, Stratix IV and Stratix V)

All our Engineers are involved in all the tasks above, and this is certainly contributing to our efficiency and to our credibility.