The Altera Technical Trainings will help you unleash all the power of the Altera devices and design tools. Note however that attending these courses without a prior solid knowledge of HDL languages and methodologies is not recommended.

We can organize these trainings on your site.

Either in Paris or on-site, we can also create YOUR fully customized Training Course, matching exactly your needs and expectations, by picking in the list below.

In any case, contact us so we can evaluate precisely your needs and propose the most efficient solution.

Important !
When the training is over, you’re not left on your own...
Our technical staff can assist you for simple matters (Email or telephone), help you start your first design, or even design a part of your project with you ! Your “teacher” is also (mainly) a designer himself and can help you with the most complex projects...

Altera Courses available at ALSE

• Designing with the Quartus II Software
• Designing with the Quartus II Software for CPLDs
• Accelerating Design Cycles with Quartus II Software
• Analyzing Designs Using Mentor Graphic's ModelSim
  & Altera's Quartus II Software
• Designing with Synplicity Synplify Pro & Altera Quartus II Software
   
• Designing with Cyclone & Cyclone II Devices
• Fundamental Design Techniques for Stratix & Stratix II Devices
• Advanced Design Techniques for Stratix & Stratix II Devices
• Using Intellectual Property & Optimizing Stratix & Stratix II Designs
• High-Speed Design Using Stratix GX Devices
• Migrating ASIC Designs to FPGAs
   
• DSP Design Series Part I: Implementing DSP Designs in FPGAs
• DSP Design Series Part II: Using FPGAs to Architect and Optimize a DSP System
   
• Designing a System on a Programmable Chip
• Designing with Nios II and SOPC Builder
   

WebEx On-Line Trainings (free for registered users)

• System-on-a-Programmable-Chip Design Using the Nios II Embedded Processor
• Using DSP Builder
• Using Quartus II Version 4.: An Introduction
• Using Quartus II Version 4.: LogicLock Regions  
• Using Quartus II Version 4.: Managing Design Changes with Chip Editor 
• Using Quartus II Version 4.: Scripting
• Using Quartus II Version 4.: Timing Analysis
• Using SOPC Builder
• Using Stratix & Stratix II High-Speed Design Features