At ALSE, we are always looking for affordable tools that can help design and verify complex systems.

The idea of implementing algorithms (expressed in C code) into hardware (FPGAs) is not new, but several tools that came up did, in our opinion, fail to bring a comfortable and affordable solution.

We have then evaluated the ImpulseC technology, and this generation of tools change drastically the paradigm, in that they are both affordable, FPGA flow friendly, and SoC compatible.

We still don’t believe future digital chips will be developped entirely in C !
But we believe now that many complex applications can take advantage of direct and optimized C to RTL conversion for some well-identified parts.
As a complementary technology, we think C-based implementation can help.

Here is a quick presentation of the concepts behind the Impulse C Technology.

CoDeveloper C to Hardware Compiler Tools

Impulse CoDeveloper is a C-based design and debugging tool provided by Impulse Accelerated Technologies. The Impulse CoDeveloper tools are compatible with standard C development tools such as Microsoft Visual Studio and GCC, and produce outputs compatible with widely-available FPGA development tools.

Impulse C, a key technology behind CoDeveloper, supports the development of highly parallel, mixed hardware/software algorithms and applications by providing a set of library functions compatible with standard C. Impulse C can be used to describe a wide variety of functions that are appropriate for compiling to FPGA hardware, including algorithms for image processing, data conversion, data compression, security, pattern recognition and many others.

The CoDeveloper tools include advanced, C to hardware compilation capabilities. The compiler converts individual C processes to functionally-equivalent hardware descriptions and generates the necessary process-to-process interface logic.

Using C for High Performance, Parallel Applications

Impulse C allows the C language to be used to describe multiple, independently synchronized units of processing and connect these units together to form a complete parallel application that may reside entirely in hardware (as low-level logic mapped to an FPGA) or be spread across hardware and software resources including embedded microprocessors and DSPs. This multi-process, parallel approach is highly appropriate for FPGA-based embedded systems, as well as for larger platforms that consist of a many (perhaps hundreds) of FPGAs interconnected with traditional processors to create a high-performance computing platform.

The ability to create mixed hardware/software applications in a common language is also helpful for creating in-system, software-driven test benches for hardware modules. In this use model, specific hardware modules (whether originally described in C or hand-crafted using HDLs) are tested using software and/or hardware test modules written in C and compiled to the embedded processor, to available FPGA resources or to both, creating a mixed software/hardware test system.

From C language to FPGA hardware

Impulse CoDeveloper allows you to design, test and implement mixed hardware/software applications in ANSI C. Use standard C development tools such as Visual Studio™, CodeWarrior™ or GCC for design entry and simulation, then generate FPGA hardware from your C language descriptions, automatically.

CoDeveloper allows you to target popular FPGA devices, with or without embedded microprocessors. Applications may be optimized (through a combination of automated compiler features and library features that allow parallel programming) to take advantage of the extreme parallelism inherent in FPGAs. The generated hardware and software can be exported to popular FPGA synthesis and simulation tools.

CoDeveloper pricing ranges from $3500 to $10,000. Annual license (subscription) pricing is also available. For more information and to request free evaluation software visit www.ImpulseC.com.