You will find here some simple examples, for beginners. However, advanced users may also find some useful information and code (Tcl/Tk, Rom inferencing from a C program, some test bench structures, use of a PC parallel port to simulate peripherals, Quadratic Encoder, PWM...).

See also our “ Intellectual Properties” page !

These examples are archived and compressed (zip format).
Their use in commercial projects is not allowed.

1. New ! Sample “Clock” Design for the Altera Max Quick Start Development kit.
   Ready to use, for simulation and complete design flow with Quartus II.
   Easy to port to any other technology.
    
2. New ! “Egg Timer” sample design for the Altera Max Quick Start Development kit.
   Ready to use, for simulation and complete design flow with Quartus II.
   Easy to port to any other technology.
    
3. Simple but Complete VHDL Project...
   Can be used with the Lattice Evaluation board, but can be ported to any other technology.
    
4. Tcl/Tk and VHDL simulation...
   Example demonstrating the use of Tcl/Tk with ModelSim.
    
5. DDFS : Sine Wave Generator (VHDL-C).
    
6. Complete application Example (VHDL) for Xilinx XESS XC40- Board.
    
7. Quadrature Encoder (Xilinx design on XESS XC40 board)
    
8. 16-bits Linear FeedBack Register with complete Test Bench (and File I/O).