If you are looking for a specific function, contact us directly at info@alse-fr.com.

We have developed internally a number of ready-to-use IPs (suitable both for optimized FPGA and for ASIC implementation). We have taken the decision to offer some functions for free no question asked, provided that you respect the disclaimers and restrictions appearing in the IPs.

• Simple, Compact & Efficient UART ! (FREE under certain conditions)
  Take a look at the Documentation... contact us to receive this IP.
   
• Simple PWM controllers (NEW + FREE IP)
  See our “Motor Control Basics” Application Note.
   
• Simple Quadrature Decoder (NEW + FREE IP).
  See our “Motor Control Basics” Application Note.
   
• Debouncer (NEW + FREE IP).
  Ever needed to handle a Push Button ?
  This parameterizable, compact, yet efficient IP (9 Logic Cells) will do the job nicely.
   
• “HeartBeat” : Fancy LED Flasher (NEW + FREE IP)
   
• Simple Keyboard Encoder (NEW + FREE IP)
  Ready for Telephone type Numeric Keypad, but easy to adapt to any matrixed keyboard.
   
• 2-lines LCD display controller in VHDL.  (FREE IP)
  This VHDL controller handles the popular 2x16 LCD.
   
• Simple PS/2 Controller   (FREE IP)
  This simple and very compact version is suitable to read from a PS/2 keyboard.
  It does not support the host -> Device communication (see below).
   
• Complete bidirectional PS/2 Controller  (FREE under certain conditions).
  This PS/2 controller is complete and includes the Host->Device communication.
  It can therefore handle any kind of PS/2 peripheral (keyboard, mouse...). A sample application is bundled and allows very quick tests of the interface: plug a keyboard or a mouse and enjoy !
  Note to students : if this is your assignment, please do not ask for this IP ! The simple version should be of enough help.
   
• Compact and efficient AMD Flash Controller.
  Developed and tested on Altera Nios Cyclone board.
   
• Compact and efficient stand-alone SDRAM controller.
  Developed and tested on Altera Nios Cyclone board.
   
• Compact and efficient stand-alone I²C controller.
   
• Fully Parametrizable FFT & iFFT (size, width, rate).
  As an example, fitted on Xilinx Virtex chips, our FFT used to be more efficient and compact than Xilinx Coregen’s. This IP can obviously be used for Polyphase filtering too.
  The behavioural model (SystemC or VHDL) can be obtained freely.
   
• Square Root. This compact macro can be parametrized (multi-cycle or pipelined, width...).
   
•   : an extremely compact version is available when limited precision is sufficient.
  
• Efficient Integer Divide macros that can be trimmed to best meet specific constraints.
   
• High-speed camera interface and de-interleaver + Optimized real time 2-D convolution filters (including Sobel Filter).
   
• Various & efficient ADC Interfaces + Behavioral models (for simulation).
   
• Very compact & efficient UARTs.
  They can be used to dramatically enhance the observability and controllability of complex FPGAs/ASICs, at a neglectable cost. They are more elaborate versions (also in Verilog) of the basic version we offer.
   
• Ultra-compact BCD <-> Binary,  inHg <-> mB/hPa converters.
   
• Highly optimized Sinewave and PWM generators.
   
• Specific avionics functions : 1553 bus + behavioral models, Arinc 429 communication, Optical Encoder Wheel “rotactors” position encoder ....
   
• Reference Design to Stress-Test FPGA and Asics (includes Built-In-Self-Test and asynchronous interface for monitoring).
   
• Partial, optimized and fully-synchronous Intel 8254 implementation.
   
• 3-phase 50Hz / 60 Hz active and reactive power calculation modules.
   
• etc... This list is not complete !