{"version":"1.0","type":"rich","provider_name":"A.L.S.E \u003Csub\u003Ethe \u003Cabbr title=\"Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.\"\u003EFPGA\u003C\/abbr\u003E Experts\u003C\/sub\u003E","provider_url":"https:\/\/www.alse-fr.com","title":"10G Ethernet for FPGAs","author_name":"Bertrand Cuzeau","width":"480","height":"295","url":"http:\/\/www.alse-fr.com\/10G-Ethernet-for-FPGAs.html","html":"\u003Ch4 class='title'\u003E\u003Ca href='http:\/\/www.alse-fr.com\/10G-Ethernet-for-FPGAs.html'\u003E10G Ethernet for FPGAs\u003C\/a\u003E\u003C\/h4\u003E\u003Cblockquote class='spip'\u003E\n\u003Cp\u003E10GEDEK = 10 Gigabits\/s Ethernet Data Exchange Kit. This IP is the evolution of our ground breaking 1G\/100M GEDEK IP to 10G Ethernet ! Yes, it\u2019s 10 times faster, and software solutions on FPGAs are unable to cope with such data rates (except maybe on very high-end SOC FPGAs). \n\n The GEDEK paradigm \n\nTwenty years ago, we invented at ALSE the concept and implementation of processor-less Ethernet communication. Our GEDEK IP became (and still is) extremely successful, allowing our customers to (\u2026)\u003C\/p\u003E\n\u003C\/blockquote\u003E\n"}