{"version":"1.0","type":"rich","provider_name":"A.L.S.E \u003Csub\u003Ethe \u003Cabbr title=\"Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.\"\u003EFPGA\u003C\/abbr\u003E Experts\u003C\/sub\u003E","provider_url":"https:\/\/www.alse-fr.com","title":"Aurora on Avant !","author_name":"Bertrand Cuzeau","width":"480","height":"295","url":"http:\/\/www.alse-fr.com\/14-Aurora-on-Avant.html","html":"\u003Ch4 class='title'\u003E\u003Ca href='http:\/\/www.alse-fr.com\/14-Aurora-on-Avant.html'\u003EAurora on Avant !\u003C\/a\u003E\u003C\/h4\u003E\u003Cblockquote class='spip'\u003E\n\u003Cp\u003EDiscover how you can create an inter-FPGA Aurora link on the latest Lattice FPGA families. \n\n In 2025, the Lattice Avant\u2122 16nm FinFET platform became available.  Taking advantage of its know-how in terms of low cost and low power consumption, Lattice now enters the mid-range FPGA market with state-of-the-art silicon. \n\nThe Avant\u2122 families offers a faster fabric and numerous high-speed transceivers channels (up to 28 channels at 25 Gbps for the largest Avant-X) that are reaching FPGA NRZ (\u2026)\u003C\/p\u003E\n\u003C\/blockquote\u003E\n"}