{"version":"1.0","type":"rich","provider_name":"A.L.S.E \u003Csub\u003Ethe \u003Cabbr title=\"Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.\"\u003EFPGA\u003C\/abbr\u003E Experts\u003C\/sub\u003E","provider_url":"https:\/\/www.alse-fr.com","title":"ALSE History","author_name":"Bertrand Cuzeau","width":"480","height":"295","url":"http:\/\/www.alse-fr.com\/ALSE-History.html","html":"\u003Ch4 class='title'\u003E\u003Ca href='http:\/\/www.alse-fr.com\/ALSE-History.html'\u003EALSE History\u003C\/a\u003E\u003C\/h4\u003E\u003Cblockquote class='spip'\u003E\n\u003Cp\u003EThis is the (now long) History of A.L.S.E ! \n\n Inception \n\nALSE was created in 1993 by me (Bertrand Cuzeau) with the voluntary and benevolent help of my retired father (Jacques Cuzeau) who passed in 2010. \n\nALSE mission was to promote new digital design tools and methodologies, and to introduce Synario (a new tool from Data I\/O) in France.  At that time, only ASIC designers used Verilog or VHDL synthesis and simulation, while Programmable Logic designers were stuck with primitive tools based (\u2026)\u003C\/p\u003E\n\u003C\/blockquote\u003E\n"}