{"version":"1.0","type":"rich","provider_name":"A.L.S.E \u003Csub\u003Ethe \u003Cabbr title=\"Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.\"\u003EFPGA\u003C\/abbr\u003E Experts\u003C\/sub\u003E","provider_url":"https:\/\/www.alse-fr.com","title":"History","author_name":"Bertrand Cuzeau","width":"480","height":"295","url":"http:\/\/www.alse-fr.com\/History.html","html":"\u003Ch4 class='title'\u003E\u003Ca href='http:\/\/www.alse-fr.com\/History.html'\u003EHistory\u003C\/a\u003E\u003C\/h4\u003E\u003Cblockquote class='spip'\u003E\n\u003Cp\u003EIn the beginning was Altera \n\nALSE has a long and strong history of three decades successfully using and supporting the Altera FPGA families and tools. \n\nAnd was an Altera Platinum Design partner and Training Center. \n\nNot surprisingly, we have developed over nearly 30 years a considerable know-how through hundreds of projects, many IPs, a complete Training courses portfolio, as well as many boards (which you can find in the  \u201cBoards\u201d section). \n\nOur Stratix V HPAPB Acquisition and (\u2026)\u003C\/p\u003E\n\u003C\/blockquote\u003E\n"}