{"version":"1.0","type":"rich","provider_name":"A.L.S.E \u003Csub\u003Ethe \u003Cabbr title=\"Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.\"\u003EFPGA\u003C\/abbr\u003E Experts\u003C\/sub\u003E","provider_url":"https:\/\/www.alse-fr.com","title":"HyperRam Memory Controller","author_name":"","width":"480","height":"295","url":"http:\/\/www.alse-fr.com\/Hyper-RAM-Controller.html","html":"\u003Ch4 class='title'\u003E\u003Ca href='http:\/\/www.alse-fr.com\/Hyper-RAM-Controller.html'\u003EHyperRam Memory Controller\u003C\/a\u003E\u003C\/h4\u003E\u003Cblockquote class='spip'\u003E\n\u003Cp\u003EThe HyperRAM memories, based on low-power PSRAM technology and using the recent HyperBus interface, are a very welcome addition to the traditional RAM memories portfolio : they have been optimized for Mobile and Automotive applications and are an excellent fit for many projects. They provide good Bandwidth performance The interface, known as \u201cHyperBus\u201d, offers a low signal count (Address, Command and Data using only eight DQ pins) They offer Low Power consumption  Typical power consumption (\u2026)\u003C\/p\u003E\n\u003C\/blockquote\u003E\n"}