{"version":"1.0","type":"rich","provider_name":"A.L.S.E \u003Csub\u003Ethe \u003Cabbr title=\"Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.\"\u003EFPGA\u003C\/abbr\u003E Experts\u003C\/sub\u003E","provider_url":"https:\/\/www.alse-fr.com","title":"Agilex 5 FPGAs","author_name":"Bertrand Cuzeau","width":"480","height":"295","url":"http:\/\/www.alse-fr.com\/The-Agilex-5-have-arrived-at-ALSE.html","html":"\u003Ch4 class='title'\u003E\u003Ca href='http:\/\/www.alse-fr.com\/The-Agilex-5-have-arrived-at-ALSE.html'\u003EAgilex 5 FPGAs\u003C\/a\u003E\u003C\/h4\u003E\u003Cblockquote class='spip'\u003E\n\u003Cp\u003EWe currently have and tested three kinds of Agilex 5 boards, shown below. We received one of the very first Intel Kits available, thanks to our friends at Altera France. We have several Arrow AXE5 Eagle boards on which we have ported and tested many of our IPs. Last we got an Arrow\/Trenz AXE5000 small board. \n\n The Arrow AXE5-Eagle Development Kit \n\nWe received one of the first tested boards from the first batch produced by Trenz. \n\nWe were able very quickly to test our Aurora 64B\/66 IP as (\u2026)\u003C\/p\u003E\n\u003C\/blockquote\u003E\n"}