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	<title>A.L.S.E the FPGA Experts</title>
	<link>https://www.alse-fr.com/</link>
	<description>A.L.S.E: Advanced Logic Synthesis for Electronics, offers a complete range of Services, IPs, Training courses and Boards to help you with the design of FPGA-based and EmbeddedSystems.</description>
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		<title>Embedded Software</title>
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		<dc:date>2016-09-27T15:09:22Z</dc:date>
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&lt;p&gt;With more and more complex and powerful Processor cores included in FPGAs, we have developed a deep competence in Embedded Systems and Embedded Software. It covers from embedded Soft CPU Cores to ARM High Performance Systems. And indeed, beyond bare metal, we are have developed very strong competences in Embedded Linux. Custom Board Support Packages One of the biggest challenges when developing software targeting a soft core embedded in an FPGA (such as the Nios II) or a hardened ARM (&#8230;)&lt;/p&gt;


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&lt;a href="http://www.alse-fr.com/-Embedded-Systems-.html" rel="directory"&gt;Embedded Systems&lt;/a&gt;


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 <content:encoded>&lt;div class='rss_chapo'&gt;&lt;p&gt;With more and more complex and powerful Processor cores included in FPGAs, we have developed a deep competence in Embedded Systems and Embedded Software. &lt;br class='manualbr' /&gt;It covers from embedded Soft CPU Cores to ARM High Performance Systems. And indeed, beyond bare metal, we are have developed very strong competences in Embedded Linux.&lt;/p&gt;&lt;/div&gt;
		&lt;div class='rss_texte'&gt;&lt;h2 class=&#034;spip&#034;&gt; Custom Board Support Packages &lt;/h2&gt;
&lt;p&gt;One of the biggest challenges when developing software targeting a soft core embedded in an &lt;abbr title=&#034;Field Programmable Gate Array. Standard devices that are customized at power up by loading a Programming pattern (aka bitstream) contained in a non-volatile memory. Users can develop completely custom functions and applications with off-the-shelf FPGAs.&#034;&gt;FPGA&lt;/abbr&gt; (such as the &lt;a href=&#034;https://www.altera.com/products/processors/overview.html&#034; class=&#034;spip_out&#034; rel=&#034;external&#034;&gt;Nios II&lt;/a&gt;) or a hardened ARM application-class processor (such as in the &lt;a href=&#034;https://www.altera.com/products/soc/overview.html&#034; class=&#034;spip_out&#034; rel=&#034;external&#034;&gt;SoC-FPGA components&lt;/a&gt;) is taking into account the flexibility of the FPGA, which allows to implement a completely custom system on chip.&lt;/p&gt;
&lt;p&gt;ALSE can develop a board support package (BSP) tailor-made for any custom system based on those technologies in a matter of days. Such a BSP is typically composed of a bootloader (U-Boot) and a Linux-based custom distribution, including a software development kit allowing the customer to develop in-house applications on top of this BSP.&lt;/p&gt;
&lt;p&gt;We often use the &lt;a href=&#034;https://buildroot.org/&#034; class=&#034;spip_out&#034; rel=&#034;external&#034;&gt;Buildroot integration tool&lt;/a&gt; to generate our BSPs, as its set of features and ease of use are a good fit for a lot of small to medium-scale embedded Linux projects. However, we are indeed mastering and using &lt;a href=&#034;https://www.yoctoproject.org/&#034; class=&#034;spip_out&#034; rel=&#034;external&#034;&gt;Yocto&lt;/a&gt;. We also deliver &lt;strong&gt;Yocto&lt;/strong&gt; trainings.&lt;/p&gt;
&lt;h2 class=&#034;spip&#034;&gt; Custom peripherals and drivers &lt;/h2&gt;
&lt;p&gt;As highlighted above, an FPGA-based system is bound to contain some custom-made peripherals. To properly access those peripherals from a running Linux system, custom drivers are needed. Developing such a driver (including, of course, device tree awareness) is well within ALSE's competence range.&lt;/p&gt;
&lt;p&gt;One example of a driver we commonly integrate is one which provides an easy and clean way for the applications running on the processor to exchange data with the FPGA.&lt;/p&gt;
&lt;p&gt;The main appeal of our &lt;abbr title=&#034;Gigabit Ethernet Data Exchange Kit. &#8220;Hardware Stack&#8221; Concept invented by ALSE, GEDEK is a processor-less autonomous block which implements the Ethernet protocols required to establish, maintain, and perform high performance data exchange over standard Ethernet.&#034;&gt;GEDEK&lt;/abbr&gt; &lt;abbr title=&#034;Intellectual Property. A usually complex function developed, tested and sold off-the-shelf to be re-used in customer's designs. Ranges from Processor cores to Memory Controllers to Video processing blocks etc&#8230; Some IPs are available from the FPGA vendor (free or at cost) or from 3rd parties.&#034;&gt;IP&lt;/abbr&gt; is to be able to use Ethernet communication without any processor. However it also features a &lt;em class=&#034;spip&#034;&gt;raw port&lt;/em&gt;, allowing a processor to use it as a &#8220;standard&#8221; &lt;abbr title=&#034;Media Access Controller. The Ethernet (802.3) MAC block is connected to the Media Interface of the Ethernet PHY (the PHYsical transceiver chip) in order to send and receive streams of bytes.&#034;&gt;MAC&lt;/abbr&gt; device, &lt;em class=&#034;spip&#034;&gt;alongside&lt;/em&gt; the normal GEDEK operation. We've developed a driver allowing this feature.&lt;/p&gt;
&lt;h2 class=&#034;spip&#034;&gt; Remote update &lt;/h2&gt;
&lt;p&gt;There is a common need in embedded systems to be able to update the application software. The usual embedded constraints mean that this is a non-trivial problem.&lt;/p&gt;
&lt;p&gt;We implemented a generic solution to this need, with the following features:&lt;/p&gt;
&lt;ul class=&#034;spip&#034; role=&#034;list&#034;&gt;&lt;li&gt; Robustness against power cuts and failed upgrades;&lt;/li&gt;&lt;li&gt; Whole-system image updates;
&lt;ul class=&#034;spip&#034; role=&#034;list&#034;&gt;&lt;li&gt; In contrast with a package manager, not safe in most embedded systems.&lt;/li&gt;&lt;li&gt; In order to keep user data intact, overlay filesystem support can easily be added.&lt;/li&gt;&lt;/ul&gt;&lt;/li&gt;&lt;li&gt; Customizable way to deliver the upgrade payload (through a web-server or any custom application);&lt;/li&gt;&lt;li&gt; Based on open-source components;&lt;/li&gt;&lt;li&gt; Able to validate signed images with OpenSSL.&lt;/li&gt;&lt;/ul&gt;&lt;/div&gt;
		
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