At ALSE, we’ve been using Lattice programmable logic even before inception (in the 80s), starting with the isp families (GALs, PLDs and CPLDs), followed by the MachXO families and FPGAs from Agere (with the popular ECP3 followed by ECP5) and from SiliconBlue (ice40).

In the 80s, Abel 5 was a popular Language to design ispGALs. Then, in the 90s, Lattice acquired an OEM version of Synario, a generic FPGA development environment represented by ALSE in France, an IDE which paved the way to all the modern IDEs that we are using today.

As of 2026, the ECP5 (with variants including transceivers) remains an interesting family on several accounts.
But the Lattice portfolio has grown with several modern FPGA families with the Nexus, Nexus-2 and Avant platforms. High speed (10G+) transceivers arrived with CertusPro Nx, and now 25+ Gbits/s with Avant Avant-G and Avant-X mid-range FPGAs. Lattice now offers capabilities to address the new markets in terms of density, power, high-speed connectivity and security.

Feel free to visit the Lattice website for details about their products.

At ALSE, we have ported most of our IPs and we have developed some specific IPs for the Lattice FPGA families. See our ChipBridge IP for example.

And indeed we have ported practically all our IPs to Lattice FPGA families, including our Aurora 8B/10B, Aurora 64B/66B, 10G-Ethernet etc.

ALSE is an official Lattice partner.