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ALSE Intellectual Property Blocks (“IPs”) are ready-to-use complex FPGA functions that you can buy from A.L.S.E and integrate in your projects.

Did you once evaluate the possibility of connecting an FPGA to Ethernet and transferring data to/from a PC for example ? Did you reach the conclusion that it was very difficult and involved a lot of complex and bulky parts ?
Then it’s time to re-consider !!!
Our GEDEK IP offers a new paradigm.

No surprise: our core competence is Designing FPGAs (or ASICs), the more complex the better.

For Education purpose, we provide here a number of Free simple IPs (for personal use only !)
Even if these blocks are quite simple, the coding style, the functions implemented, and the unitary verification methodology (test benches and behavioral models) are nonetheless very typical and representative of modern FPGA design.

Attending an ALSE training is 95% guaranteed to be satisfactory!

Le squelette SPIP SoyezCreateurs utilisé sur ce site est conçu pour faciliter la mise en œuvre des bonnes pratiques de l’accessibilité des sites pour tous.

Terms of Use © 2009-2016 ALSE. All rights reserved. NOTICE OF DISCLAIMER about Free IPs and other information on the ALSE Web site. ALSE is providing design, code, or information “as is.” By providing the design, code, or information ALSE makes no representation that this implementation is free (...)

Advanced Logic Synthesis for Electronics (“A.L.S.E”), offers a complete range of Design Services, Trainings, IPs, and Boards to help you with the design of FPGA-based applications or Embedded Systems.