VHDL helper

This section is for VHDL users.
It includes various useful articles, VHDL templates with code examples, and some Utilities.

This article describes an error that I found only recently in NUMERIC_STD.

Conclusion : do not multiply signed or unsigned vectors by an integer !

If you are looking for well-written code to analyze, or coding examples, please check also our Free IP section where you can find the source code of many IPs, which are reasonably simple to understand while implementing all the concepts needed for designing complex functions.

We have dedicated this page to Code Templates, so beginners or more advanced designers can simply cut & paste from the snippets.
There is enough code here to be used in 90% of VHDL code (both RTL and Simulation).

Beginners: don’t miss some Application Notes especially “Writing Test benches”.

Note : the code below is compatible with all (decent) synthesis tools (it does not use VHDL 2008 constructs).

© 2009 ALSE. All rights reserved.
NOTICE OF DISCLAIMER about Free IPs and other information on the ALSE Web site.
ALSE is providing design, code, or information “as is.” By providing the design, code, or information ALSE makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implementation. You are entirely responsible with any use you make of the provided information, code or design.
ALSE expressly disclaims any warranty whatsoever with respect to the adequacy of the information, or to the suitability to any use beyond education, including but not limited to any warranties or representations that this information is free from claims of infringement and any implied warranties of merchandability or fitness for a particular purpose.

These utilities are free to use, with the usual disclaimer above: use this at your own risk.