We have designed a synchronous but limited RTL model of the Intel 8254 Programmable Timer / Counter.

We have used this model in combination with the model of the 6809 CPU to re-design a complete obsolete industrial board into an FPGA.

Our 8254 model is currently not exhaustive: we have only modeled and tested the functions that were used in the design.

It’s typically easy to verify how the 8254 was used, and make sure the RTL model will behave adequately.

If you are interested in this model, let us know, we could complete it if necessary for your project.